1. Field of the Invention
The present invention relates to an electronic device such as a multi-chip module having a dewing prevention structure.
2. Description of the Related Art
Not a few semiconductor devices as electronic devices have their operation performance improved by the cooling down below a room temperature. It is well known that because LSI such as CMOS, HEMT and the like, in particular, have the mobility of carriers in a semiconductor increased by a decrease in temperature, they can operate at a high speed when the temperature of a junction portion is decreased. It is also well known that decreasing the temperature of the whole chip leads to suppression of diffusion of impurities in the chip and migration of an internal wiring pattern, thereby improving reliability. Therefore, it is widely conducted to cool operation environments of these semiconductor devices down to a low temperature.
In low temperature cooling, however, when a surface temperature of a cooling member or a part mounted in the vicinity of the same (e.g. a substrate or a pin of a multi-chip module, or a packaging board on which a multi-chip module is mounted or the like) goes below a dew point temperature of the surrounding atmosphere, the surface is dewed. Dewing occurring at a pin of a multi-chip module causes such trouble as power supply short circuit, while dewing occurring at a substrate will cause migration of a substrate wiring.
Moreover, dewing occurring at a packaging board invites corrosion and when it occurs at other places, water drop falling on a packaging board and on a feeder pad or a signal pad on a packaging board will be a cause of a failure.
Under these circumstances, various structures have been proposed or put into practical use to prevent such dewing. Japanese Patent Laying-Open (Kokai) No. 2000-101000, for example, discloses a structure in which a pattern for heating is fabricated into the vicinity of a pin attachment surface of a multilayer wiring substrate in a multi-chip module. This structure is intended to increase a temperature of a pin to be higher than a dew point of the surrounding atmosphere in order to prevent dewing at the pin by sealing space above the multilayer wiring substrate by a module cap to which a cooler is attached, while sending an electric current to the heater in the multilayer wiring substrate.
Since in the structure proposed in the above-described literature, a semiconductor chip is sealed within the atmosphere of inert gas such as nitrogen by the multilayer wiring substrate and module cap, the module cap with the cooler mounted thereon directly attaches to the peripheral portion of the multilayer wiring substrate. As a result, pins disposed at the peripheral portion of the multilayer wiring substrate are liable to have a lower temperature than that of pins located at the central portion of the multilayer wiring substrate, thereby causing a temperature distribution in the pins at the peripheral portion of the substrate and those at the central portion of the same.
Accordingly, even when the pins at the central portion of the multilayer wiring substrate are set at an optimum temperature at which no dewing is caused, the pins at the peripheral portion of the multilayer wiring substrate will be in danger of dewing. In addition, since the multilayer wiring substrate is heated while being directly cooled, power consumed for cooling and heating will be increased.